Glitch free NAND based Digitally Controlled Delay Line for Spread Spectrum Clock Generator

NAND based digitally controlled delay-lines (DCDL) are used in wide range of applications. The existing NANDbased (DCDL) is having a glitching problem, which limit their use in many applications. This paper introduces glitch-free NAND-based DCDL which overcome the limitation of existing NANAD based DCDL. This NANDbased DCDL maintains the same resolution and minimum delay of previously proposed NAND-based DCDL. In this paper this proposed DCDL is used to realize an All-digital spread-spectrum clock generator (SSCG). The use of proposed DCDL in this circuit allows to reduce the peakto-peak absolute output jitter of more than the 40% with respect to a SSCG using three-state inverter based DCDLs.